Improved Architecture of FDTD Dataflow Machine for Larger Scale Microwave Simulation

As a portable High Performance Computing (HPC) technology for microwave simulations, several kinds of dedicated computers for the Finite-Difference Time-Domain (FDTD) method have been considered. Author also proposed a dataflow architecture FDTD dedicated computer and it was shown that the estimated performance of the FDTD dataflow machine can exceed those of the high-end PC and GPU computers. On the other hand, the digital circuit of the FDTD dataflow machine was inefficiently implemented on the Field-Programmable Gate Array (FPGA) owing to dual operation modes of a normal FDTD grid and Perfectly Matched Layer (PML) grid, that is, almost half part of FPGA was not used in the conventional machine. This paper proposes an improved architecture of the 3-D FDTD dedicated computer with the dual operation modes to improve the efficiency in its implementation on the FPGA.